mirror of
https://github.com/42wim/matterbridge.git
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379 lines
5.7 KiB
ArmAsm
379 lines
5.7 KiB
ArmAsm
// Code generated by command: go run fe_amd64_asm.go -out ../fe_amd64.s -stubs ../fe_amd64.go -pkg field. DO NOT EDIT.
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// +build amd64,gc,!purego
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#include "textflag.h"
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// func feMul(out *Element, a *Element, b *Element)
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TEXT ·feMul(SB), NOSPLIT, $0-24
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MOVQ a+8(FP), CX
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MOVQ b+16(FP), BX
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// r0 = a0×b0
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MOVQ (CX), AX
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MULQ (BX)
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MOVQ AX, DI
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MOVQ DX, SI
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// r0 += 19×a1×b4
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MOVQ 8(CX), AX
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IMUL3Q $0x13, AX, AX
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MULQ 32(BX)
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ADDQ AX, DI
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ADCQ DX, SI
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// r0 += 19×a2×b3
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MOVQ 16(CX), AX
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IMUL3Q $0x13, AX, AX
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MULQ 24(BX)
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ADDQ AX, DI
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ADCQ DX, SI
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// r0 += 19×a3×b2
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MOVQ 24(CX), AX
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IMUL3Q $0x13, AX, AX
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MULQ 16(BX)
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ADDQ AX, DI
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ADCQ DX, SI
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// r0 += 19×a4×b1
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MOVQ 32(CX), AX
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IMUL3Q $0x13, AX, AX
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MULQ 8(BX)
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ADDQ AX, DI
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ADCQ DX, SI
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// r1 = a0×b1
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MOVQ (CX), AX
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MULQ 8(BX)
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MOVQ AX, R9
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MOVQ DX, R8
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// r1 += a1×b0
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MOVQ 8(CX), AX
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MULQ (BX)
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ADDQ AX, R9
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ADCQ DX, R8
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// r1 += 19×a2×b4
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MOVQ 16(CX), AX
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IMUL3Q $0x13, AX, AX
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MULQ 32(BX)
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ADDQ AX, R9
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ADCQ DX, R8
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// r1 += 19×a3×b3
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MOVQ 24(CX), AX
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IMUL3Q $0x13, AX, AX
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MULQ 24(BX)
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ADDQ AX, R9
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ADCQ DX, R8
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// r1 += 19×a4×b2
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MOVQ 32(CX), AX
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IMUL3Q $0x13, AX, AX
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MULQ 16(BX)
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ADDQ AX, R9
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ADCQ DX, R8
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// r2 = a0×b2
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MOVQ (CX), AX
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MULQ 16(BX)
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MOVQ AX, R11
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MOVQ DX, R10
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// r2 += a1×b1
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MOVQ 8(CX), AX
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MULQ 8(BX)
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ADDQ AX, R11
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ADCQ DX, R10
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// r2 += a2×b0
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MOVQ 16(CX), AX
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MULQ (BX)
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ADDQ AX, R11
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ADCQ DX, R10
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// r2 += 19×a3×b4
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MOVQ 24(CX), AX
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IMUL3Q $0x13, AX, AX
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MULQ 32(BX)
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ADDQ AX, R11
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ADCQ DX, R10
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// r2 += 19×a4×b3
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MOVQ 32(CX), AX
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IMUL3Q $0x13, AX, AX
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MULQ 24(BX)
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ADDQ AX, R11
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ADCQ DX, R10
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// r3 = a0×b3
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MOVQ (CX), AX
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MULQ 24(BX)
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MOVQ AX, R13
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MOVQ DX, R12
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// r3 += a1×b2
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MOVQ 8(CX), AX
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MULQ 16(BX)
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ADDQ AX, R13
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ADCQ DX, R12
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// r3 += a2×b1
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MOVQ 16(CX), AX
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MULQ 8(BX)
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ADDQ AX, R13
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ADCQ DX, R12
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// r3 += a3×b0
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MOVQ 24(CX), AX
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MULQ (BX)
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ADDQ AX, R13
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ADCQ DX, R12
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// r3 += 19×a4×b4
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MOVQ 32(CX), AX
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IMUL3Q $0x13, AX, AX
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MULQ 32(BX)
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ADDQ AX, R13
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ADCQ DX, R12
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// r4 = a0×b4
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MOVQ (CX), AX
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MULQ 32(BX)
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MOVQ AX, R15
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MOVQ DX, R14
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// r4 += a1×b3
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MOVQ 8(CX), AX
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MULQ 24(BX)
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ADDQ AX, R15
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ADCQ DX, R14
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// r4 += a2×b2
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MOVQ 16(CX), AX
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MULQ 16(BX)
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ADDQ AX, R15
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ADCQ DX, R14
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// r4 += a3×b1
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MOVQ 24(CX), AX
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MULQ 8(BX)
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ADDQ AX, R15
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ADCQ DX, R14
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// r4 += a4×b0
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MOVQ 32(CX), AX
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MULQ (BX)
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ADDQ AX, R15
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ADCQ DX, R14
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// First reduction chain
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MOVQ $0x0007ffffffffffff, AX
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SHLQ $0x0d, DI, SI
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SHLQ $0x0d, R9, R8
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SHLQ $0x0d, R11, R10
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SHLQ $0x0d, R13, R12
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SHLQ $0x0d, R15, R14
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ANDQ AX, DI
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IMUL3Q $0x13, R14, R14
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ADDQ R14, DI
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ANDQ AX, R9
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ADDQ SI, R9
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ANDQ AX, R11
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ADDQ R8, R11
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ANDQ AX, R13
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ADDQ R10, R13
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ANDQ AX, R15
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ADDQ R12, R15
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// Second reduction chain (carryPropagate)
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MOVQ DI, SI
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SHRQ $0x33, SI
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MOVQ R9, R8
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SHRQ $0x33, R8
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MOVQ R11, R10
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SHRQ $0x33, R10
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MOVQ R13, R12
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SHRQ $0x33, R12
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MOVQ R15, R14
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SHRQ $0x33, R14
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ANDQ AX, DI
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IMUL3Q $0x13, R14, R14
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ADDQ R14, DI
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ANDQ AX, R9
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ADDQ SI, R9
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ANDQ AX, R11
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ADDQ R8, R11
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ANDQ AX, R13
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ADDQ R10, R13
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ANDQ AX, R15
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ADDQ R12, R15
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// Store output
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MOVQ out+0(FP), AX
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MOVQ DI, (AX)
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MOVQ R9, 8(AX)
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MOVQ R11, 16(AX)
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MOVQ R13, 24(AX)
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MOVQ R15, 32(AX)
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RET
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// func feSquare(out *Element, a *Element)
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TEXT ·feSquare(SB), NOSPLIT, $0-16
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MOVQ a+8(FP), CX
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// r0 = l0×l0
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MOVQ (CX), AX
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MULQ (CX)
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MOVQ AX, SI
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MOVQ DX, BX
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// r0 += 38×l1×l4
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MOVQ 8(CX), AX
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IMUL3Q $0x26, AX, AX
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MULQ 32(CX)
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ADDQ AX, SI
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ADCQ DX, BX
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// r0 += 38×l2×l3
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MOVQ 16(CX), AX
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IMUL3Q $0x26, AX, AX
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MULQ 24(CX)
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ADDQ AX, SI
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ADCQ DX, BX
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// r1 = 2×l0×l1
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MOVQ (CX), AX
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SHLQ $0x01, AX
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MULQ 8(CX)
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MOVQ AX, R8
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MOVQ DX, DI
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// r1 += 38×l2×l4
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MOVQ 16(CX), AX
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IMUL3Q $0x26, AX, AX
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MULQ 32(CX)
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ADDQ AX, R8
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ADCQ DX, DI
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// r1 += 19×l3×l3
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MOVQ 24(CX), AX
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IMUL3Q $0x13, AX, AX
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MULQ 24(CX)
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ADDQ AX, R8
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ADCQ DX, DI
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// r2 = 2×l0×l2
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MOVQ (CX), AX
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SHLQ $0x01, AX
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MULQ 16(CX)
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MOVQ AX, R10
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MOVQ DX, R9
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// r2 += l1×l1
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MOVQ 8(CX), AX
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MULQ 8(CX)
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ADDQ AX, R10
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ADCQ DX, R9
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// r2 += 38×l3×l4
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MOVQ 24(CX), AX
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IMUL3Q $0x26, AX, AX
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MULQ 32(CX)
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ADDQ AX, R10
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ADCQ DX, R9
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// r3 = 2×l0×l3
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MOVQ (CX), AX
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SHLQ $0x01, AX
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MULQ 24(CX)
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MOVQ AX, R12
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MOVQ DX, R11
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// r3 += 2×l1×l2
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MOVQ 8(CX), AX
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IMUL3Q $0x02, AX, AX
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MULQ 16(CX)
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ADDQ AX, R12
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ADCQ DX, R11
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// r3 += 19×l4×l4
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MOVQ 32(CX), AX
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IMUL3Q $0x13, AX, AX
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MULQ 32(CX)
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ADDQ AX, R12
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ADCQ DX, R11
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// r4 = 2×l0×l4
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MOVQ (CX), AX
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SHLQ $0x01, AX
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MULQ 32(CX)
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MOVQ AX, R14
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MOVQ DX, R13
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// r4 += 2×l1×l3
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MOVQ 8(CX), AX
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IMUL3Q $0x02, AX, AX
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MULQ 24(CX)
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ADDQ AX, R14
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ADCQ DX, R13
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// r4 += l2×l2
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MOVQ 16(CX), AX
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MULQ 16(CX)
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ADDQ AX, R14
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ADCQ DX, R13
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// First reduction chain
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MOVQ $0x0007ffffffffffff, AX
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SHLQ $0x0d, SI, BX
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SHLQ $0x0d, R8, DI
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SHLQ $0x0d, R10, R9
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SHLQ $0x0d, R12, R11
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SHLQ $0x0d, R14, R13
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ANDQ AX, SI
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IMUL3Q $0x13, R13, R13
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ADDQ R13, SI
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ANDQ AX, R8
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ADDQ BX, R8
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ANDQ AX, R10
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ADDQ DI, R10
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ANDQ AX, R12
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ADDQ R9, R12
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ANDQ AX, R14
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ADDQ R11, R14
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// Second reduction chain (carryPropagate)
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MOVQ SI, BX
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SHRQ $0x33, BX
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MOVQ R8, DI
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SHRQ $0x33, DI
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MOVQ R10, R9
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SHRQ $0x33, R9
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MOVQ R12, R11
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SHRQ $0x33, R11
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MOVQ R14, R13
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SHRQ $0x33, R13
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ANDQ AX, SI
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IMUL3Q $0x13, R13, R13
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ADDQ R13, SI
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ANDQ AX, R8
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ADDQ BX, R8
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ANDQ AX, R10
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ADDQ DI, R10
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ANDQ AX, R12
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ADDQ R9, R12
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ANDQ AX, R14
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ADDQ R11, R14
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// Store output
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MOVQ out+0(FP), AX
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MOVQ SI, (AX)
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MOVQ R8, 8(AX)
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MOVQ R10, 16(AX)
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MOVQ R12, 24(AX)
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MOVQ R14, 32(AX)
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RET
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